Analytical modeling of surface accumulation behavior of fully depleted SOI four gate transistors (G(4)-FETs)

Shehrin Sayed, Birck Nanotechnology Center, Purdue University; Bangladesh University of Engineering and Technology
M. Ziaur Rahman Khan, Bangladesh University of Engineering and Technology

Date of this Version

3-2013

Citation

Solid-State Electronics Volume 81, March 2013, Pages 105–112

Abstract

A charge sheet model is proposed to analyze the transistor characteristics of fully depleted SOI four gate field effect transistors (G(4)-FETs). The model is derived assuming a parabolic potential variation between the junction-gates and by solving 2-D Poisson's equation. The proposed model facilitates the calculation of surface potential and charge densities as a function of all gate biases. Modifying this charge sheet model for non-equilibrium condition, current-voltage and capacitance-voltage characteristics are also analyzed. Different back surface charge conditions are considered for each analysis. The models are compared with 3-D Silvaco/Atlas simulation results which show good agreement. (C) 2013 Elsevier Ltd. All rights reserved.

Discipline(s)

Nanoscience and Nanotechnology

 

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