Design of high-current L-valley GaAs/AlAs0.56Sb0.44/InP (111) ultra-thin-body nMOSFETs

Saumitra Mehrotra, Birck Nanotechnology Center, Purdue University
Michael Povolotskyi, Birck Nanotechnology Center, Purdue University
Jeremy Law, Birck Nanotechnology Center, Purdue University
Tillmann Kubis, Birck Nanotechnology Center, Purdue University
Gerhard Klimeck, Network for Computational Nanotechnology, Birck Nanotechnology Center, Purdue University
Mark Rodwell, Birck Nanotechnology Center, Purdue University

Abstract

We propose and analyze a high-current III-V transistor design using electron transport in the Gamma- and L-valleys of (111) GaAs. Using sp(3)d(5)s* empirical tight-binding model for band-structure calculations and the top-of-the-barrier transport model, improved drive current is demonstrated using L-valley transport in a strained GaAs channel grown on an (111) InP substrate. At a body thickness of 2 nm the (111) GaAs/InP MOSFET design outperforms both (100) Si and (100) GaAs/InP for all EOTs larger than 0.3nm.

Discipline(s)

Nanoscience and Nanotechnology