Design and synthesis of adiabatic circuits for low power

Yibin Ye, Purdue University

Abstract

With the recent trend toward portable communication and computing, power dissipation has become one of the major design concerns along with area and performance. Research to reduce power dissipation at various levels of design abstraction has started in earnest to achieve ultra-low power with optimum performance. We consider circuit level techniques for low-energy computation using the principles of adiabatic switching. Energy-recovery using adiabatic switching is a relatively new idea. Although the concept of reversible logic and zero-energy computing can be traced back to the early 1970's, the attempt to realize the concept in electronic circuits is a new endeavor. We developed different logic families: A reversible style adiabatic logic, which has theoretical interest, and a Quasi-Static Adiabatic Logic, which can be implemented in standard CMOS technology. The logic families achieved significant power savings (as high as 90%) compared to standard CMOS realization. We also extended the concept of adiabatic switching to SRAM's and clock generation circuits. We have designed and simulated an 8 $\times$ 8 carry-save quasi-static adiabatic multiplier, which consumes 37% less energy at 100 M Hz compared to CMOS carry-save multiplier. Adiabatic logic is most suitable for arithmetic and highly pipelined DSP applications, in which XOR gates are heavily used. We also studied one of the problems in logic synthesis for adiabatic circuits--optimization of XOR based logic. An XOR-Based Decomposition Diagram (XORDD) has been introduced to represent logic functions. Synthesis techniques based on XORDD for XOR heavy circuits has been developed. Results show that the synthesis technique is efficient and produces better results comparable to ESPRESSO (logic minimizer) for certain classes of logic functions. The power consumption of the resultant XOR dominated circuits from XORDD techniques is also discussed, in which we consider different implementations and internal structure of XOR gates.

Degree

Ph.D.

Advisors

Roy, Purdue University.

Subject Area

Electrical engineering

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