Germanium/silicon heterostructure nanowires and group III-V nanowires for low-power high-performance nanoelectronics

Yanjie Zhao, Purdue University

Abstract

The research on nanowire related topics is one of the most rapidly growing and expanding fields for the last decade. Not only did it provide a brand new platform for exploring the fundamental sciences, but also enormous potential in industry applications in the near future. In electronics, scaling down Si based conventional MOSFETs while improving their performance continuously has become increasingly difficult over the last couple of years. At the same time, aiming at continuously improving the performance and reducing the power consumption of transistors, semiconductor nanowire based nanoelectronics have been rapidly explored. In this dissertation, the basics of nanowire synthesis and the fundamental advantages of nanowire based nanoelectronics were reviewed. Particularly, the BTBT FETs for low-power consumption and the group III-V nanowire based FETs toward high-performance application were reviewed. To realize nanowire based BTBT FETs, a rational synthesis of Ge/Si core/shell nanowires with doped Si shells was studied in term of the morphology, growth rate, and junction abruptness. The distinctly different electrical characteristics suggested the preferred transport path through the nanowire structure can be modulated by appropriately tuning the growth conditions. The low-temperature thermal oxidation of nanowires - a key step in the nanowire BTBT FETs fabrication - was also carried out and discussed. Toward high-performance nanowire FETs, the vapor deposition synthesis and material characterization of InSb and InAs nanowires were presented. The ambipolar behavior and different on/off-ratios were observed from electrical characterization of InSb and InAs nanowire FETs. To explain the observed characteristics, a simple yet powerful model describing the current transport in nanowire back-gated FETs with metal S/D contacts was presented. The impact of Schottky barrier was evaluated by simulation, and was found to be mainly contributed to the different reported on/off-ratios. As the Schottky barrier thickness keeps reducing due to the ongoing scaling down of device sizes, the trend of all transfer curves converting into the ideal symmetrical ambipolar curve with on/off-ratio only depending on the channel bandgap was also predicted. An outlook was also presented in this dissertation on the following topics: the conditions for Ge/Si nanowire BTBT FETs to reach sub-60mV/dec of inverse subthreshold slope at RT; realization of 1D transport of nanowire FETs at RT; and the BTBT FETs based on III-V heterostructure nanowires with broken-gap configuration.

Degree

Ph.D.

Advisors

Yang, Purdue University.

Subject Area

Nanoscience|Solid State Physics|Nanotechnology

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