3D integration and its application for distributed circuits and systems

Rosa Roientan Lahiji, Purdue University

Abstract

In today’s technologies chips with higher degree of integration and functionality but yet smaller size and lower power consumption have attracted a lot of attention. On the other hand, the benefits of using distributed components such as transmission lines which provide higher quality factor passive components within CMOS technology cannot be neglected. Advances in CMOS technology have improved the performance in a comparable level to compound semiconductor devices. The research described herein will lead to three-dimensional integrated circuits appropriate for applications in CMOS technology. The main focus lies in addressing challenges associated with manufacturing small-footprint, distributed circuits and systems. Traditional distributed circuits occupy a large area due to multiple long transmission lines necessary in these circuits. In this research the approach is to reduce the footprint of distributed circuits by folding transmission lines in the third dimension. An important aspect of these three-dimensional circuits is designing very low-loss and wideband vertical interconnects. Such vertical interconnects are investigated through the course of this study. Different transmission line architectures are employed, and three dimensional transitions between different architectures are studied through real fabrication and measurements. Finally, the application of these transitions is demonstrated through implementation of three dimensional circuit components using CMOS technology.^

Degree

Ph.D.

Advisors

Saeed Mohammadi, Purdue University, Linda P. B. Katehi, Purdue University.

Subject Area

Engineering, Electronics and Electrical

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