Thermal modeling, analysis, and management techniques for nano-scale VLSI circuits
Abstract
Higher die temperature due to increasing power density pose a major reliability concern in present-day VLSI circuits. Elevated device temperature degrades system performance by increasing delay and delay variations and also accelerates degradation mechanisms such as electro-migration (EM), negative bias temperature instability (NBTI), and hot carrier injection (HCI). In the first part of the research, we present thermal models and algorithms for device temperature estimation. Estimating device temperature in the early design phases is important to alleviate thermal issues quickly and saves iterative simulations that might otherwise be required to converge to a good thermal solution. We propose a methodology to solve leakage power and device temperature self-consistently. Temperature-dependent leakage power model along with gate-level thermal models for 28nm FinFET circuits is proposed for self-consistent estimation. Next, we investigate the effects of process variation on device temperature and temperature spread under process variation through Monte Carlo simulations. Results show that high activity circuits exhibit larger temperature variation. It is also shown that under severe process variations thermal runaway may occur for a large percentage of chips. In the second part of the research, we discuss design techniques for thermal/power management. We develop a dynamic thermal management technique with low performance overhead for microprocessors. The proposed method allows us to manage temperature while maintaining the rated clock frequency. Finally, we present a clock-gating scheme for pipeline systems. The proposed clock-gating technique improves clock power by dynamically making pipeline registers transparent. This technique also allows efficient energy/performance trade-off through pipeline collapsing and dynamic frequency scaling.
Degree
Ph.D.
Advisors
Roy, Purdue University.
Subject Area
Electrical engineering
Off-Campus Purdue Users:
To access this dissertation, please log in to our
proxy server.