A distributed power delivery and decoupling network minimizing ohmic loss and supply voltage variation in silicon nanoscale technologies

Mark Michael Budnik, Purdue University

Abstract

As the transistor count and performance expectations of integrated circuits have grown, their power consumption has approximately doubled every thirty-six months. To minimize power consumption and maintain dielectric reliability, the supply voltage of microprocessors has been scaled down. As the operating voltage decreases, more current is required to meet the growing power requirements. This research addresses two significant problems created by these circumstances, each of which will continue to grow as time (and technology) progresses: IR events and di/dt events. ^ In an IR event, ohmic losses occur as current flows through an integrated circuit's power delivery path. We have proposed to reduce the ohmic losses in this path by delivering the input power at a higher voltage and lower current. We have developed a step-down power conversion architecture for the integrated circuit to deliver the required operating voltage in a distributed fashion. Each regulation node in the distributed network provides the power necessary for small geographic portions of the die. The distributed regulation nodes can also customize the operating voltages of the integrated circuit's functional blocks allowing optimal power and performance trade-offs. ^ Changes in operating current over time are known as di/dt events. As operating currents increase, the magnitude of di/dt events will also increase. Parasitic elements in the device's power delivery and decoupling network create three resonant loops, each with its own resonant frequency. di/dt events cause supply voltage variations at these resonant frequencies and adversely affect the integrated circuit's performance. We have proposed to use the distributed regulation nodes to rapidly respond to di/dt events to minimize the three supply voltage variation droops. The proposed power delivery network will also allow designers to minimize the integrated circuit's and system's decoupling capacitance, drastically lowering leakage current and reducing system cost and complexity. Finally, a new device, the carbon nanotube capacitor (CNCAP), has been proposed. This capacitor could allow for a one to two order of magnitude improvement in the capacitance per unit area (compared to conventional integrated capacitors), allowing a completely integrated, regulated distributed power delivery and decoupling network.^

Degree

Ph.D.

Advisors

Kaushik Roy, Purdue University.

Subject Area

Engineering, Electronics and Electrical

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