Voltage over-scaling in unbalanced pipelines with adaptive clocking

Christine A Placek, Purdue University

Abstract

Pipelining – the technique of separating different stages of a circuit using registers – is a common design strategy used to improve throughput. In traditional pipeline design, it is desirable to make all the stages equal in length; otherwise, the longest stage constrains the clock period. However, the performance of an unbalanced pipeline may be improved by applying critical path isolation and adaptive clocking to its longest stage. The critical paths in the longest stage of the pipeline are designed to rarely activate. By examining the inputs to the stage, these activations can be predicted. Then, the supply voltage is lowered so that the critical paths will incur timing failure. The power of the pipeline has been reduced, and the circuit operates normally as long as the critical paths are not activated. In the case of a critical path operation, this operation is predicted ahead of time and the pipeline is stalled for one cycle by gating the clocks, allowing the critical path two cycles to complete. These occasional two-cycle operations negatively impact the throughput of the pipeline, but this impact will be minimal as long as critical path occurrence is rare. In this work, a Wallace tree multiplier is used as an example of an unbalanced pipeline to which adaptive clocking is applied. While maintaining the frequency of the conventional design, the voltage can be scaled down for power savings of 12-22%.

Degree

M.S.E.C.E.

Advisors

Roy, Purdue University.

Subject Area

Electrical engineering

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