S. Krishnan, S. V. Garimella, G. Chrysler, and R. Mahajan, “Towards a Thermal Moore’s Law,” IEEE Transactions on Advanced Packaging, Vol. 30 (3), pp. 462-474, 2007.
Thermal design power trends and power densities for present and future single-core microprocessors are investigated. These trends are derived based on Moore’s law and scaling theory. Both active and stand-by power are discussed and accounted for in the calculations. A brief discussion of various leakage power components and their impact on the power density trends is provided. Two different lower limits of heat dissipation for irreversible logic computers that have previously appeared in the literature are discussed. These are based on the irreversibility of logic to represent one bit of information, and on the distribution of electrons to represent a bit. These limits are found to be two or more orders of magnitude lower than present-day microprocessor thermal design power trends. Further, these thermal demand trends are compared to the projected trends for the desktop product sector from the International Technology Roadmap for Semiconductors (ITRS). To evaluate the thermal impact of projected power densities, heat sink thermal resistances are calculated for a given technology target. Based on the heat sink thermal resistance trends, the evolution of a consistent air-cooling limit is predicted. One viable alternative to air-cooling, i.e., the use of high-efficiency solid-state thermoelectric coolers (TECs), is explored in detail. The impact of different parasitics on the thermoelectric figure of merit (ZT) is quantified.
Terms—Density factor, power density, thermal design power, thermal resistance, thermoelectrics
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